FPGA/ASIC Verification Engineer
SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars.
FPGA/ASIC VERIFICATION ENGINEER
Would you like to become part of team developing silicon for low earth orbit Satellites that deliver broadband connectivity to the people who either do not have access to internet or have spotty internet connectivity? Come join the team working on silicon projects that is driving more integration, lower power, mixed signal architectures and next generation silicon technology to be deployed in space and ground infrastructures.
- Responsible for digital ASIC and/or FPGA verification at block and system level
- Write and review test plans, develop test harnesses (UVM, System Verilog based) and test sequences
- Responsible for test plan execution, running regressions, code and functional coverage closure
- Contribute towards pre-silicon Verification, chip bring-up and post-silicon validation
- Hands-on self-starter who can execute the steps required to fully verify a complex digital design
- Bachelor’s degree in computer engineering or electrical engineering
- 3+ years of experience in ASIC/FPGA design verification using SystemVerilog and/or C++
PREFERRED SKILLS AND EXPERIENCE:
- Master’s degree in computer engineering, electrical engineering or other engineering discipline
- Experience with verification methodologies such as UVM/OVM/VMM
- Expertise in developing test plans, defining/implementing coverage models, and analyzing results
- Experience creating scalable verification environments
- Ability to write scripts (bash/csh, Python, Perl, TCL, etc.) and test automations
- Exposure with industry standard verification tools: simulators (Questa, VCS, IES), code coverage tools, debug tools (Verdi, Visualizer), bug tracking tools etc.
- Strong object-oriented programming knowledge
- Constrained random verification experience
- Experience with dynamic simulation and/or formal based verification methodologies
- RTL design, chip bring-up, post-silicon validation experience
- Exposure to packet based protocols (PCIe, ethernet), or wireless protocols (LTE, Wi-Fi), or DSP algorithms
- Familiarity with testing complex designs, code and functional coverage, and assertions
- Ability to work in a dynamic environment with changing needs and requirements
- To conform to U.S. Government space technology export regulations, including the International Traffic in Arms Regulations (ITAR) you must be a U.S. citizen, lawful permanent resident of the U.S., protected individual as defined by 8 U.S.C. 1324b(a)(3), or eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR here.
SpaceX is an Equal Opportunity Employer; employment with SpaceX is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.
Applicants wishing to view a copy of SpaceX’s Affirmative Action Plan for veterans and individuals with disabilities, or applicants requiring reasonable accommodation to the application/interview process should notify the Human Resources Department at (310) 363-6000.
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